n1506 ms pc b8-6591, b8-6996 no.7868-1/10 any and all sanyo semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo semiconductor representative nearest you before using any sanyo semiconductor products described or contained herein in such applications. sanyo semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor products described or contained herein. LA75676VA overview the LA75676VA is a vif/sif ic that supports ntsc intercarrier reception and adopts a semi-adjustment-free design. it is provided in the ssop24 (225mil, 0.5mm lead pitch) package, which is appropriate for miniature 2-in-1 tuner products. in the vif block, it adopts a design that uses aft adjustment to obviate the need for vco ad justment, and thus can simplify the adjustment steps required in end product manufacturing. it uses a pll technique for fm detection. it features the 5v supply voltage appropriate for multimedia products. in addition, it achieves superb audio quality by incorporating a buzz canceller that suppre sses nyquist buzzing. functions ? vif block: vif amplifier, buzz can celler, pll detector, if agc, rf ag c, aft, and an equalizer amplifier ? sif block: limiter amplifier, pll fm detector specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc max 6v circuit voltage v13, v17 v cc v i6 -3 ma i10 -10 ma circuit current i24 -2 ma allowable power dissipation pd max ta 70 c * mounted on a board 600 mw operating temperature topr -20 to +70 c storage temperature tstg -55 to +150 c * when mounted on a 114.376.11.6mm 3 glass epoxy board. operating conditions at ta = 25 c parameter symbol conditions ratings unit recommended supply voltage v cc 5v operating supply voltage range v cc op 4.5 to 5.5 v monolithic linear ic if signal processor (vif+sif) for tv and vcr products orderin g numbe r : en7868
LA75676VA no.7868-2/10 electrical characteristics at ta = 25 c, v cc = 5v, fp = 45.75mhz ratings parameter symbol conditions min typ max unit [vif block] circuit current i5 33 41 49 ma maximum rf agc voltage v14h v cc -0.5 v cc v minimum rf agc voltage v14l 0 0.5 v input sensitivity vi s1 = off 32 38 44 db v agc range gr 58 63 db maximum allowable input vi max 95 100 db v video output voltage (no input) v6 3.5 3.8 4.1 v sync signal tip voltage v6tip 0.9 1.2 1.5 v video output level v o 1.7 2 2.3 vp-p black noise threshold voltage vbth 0.5 0.8 1.1 v black noise clamp voltage vbcl 1.6 1.9 2.2 v video signal-to-noise ratio s/n 48 52 db c-s beating ic-s 38 43 db frequency characteristics fc 6mhz -3 -1.5 db differential gain dg 3 6.5 % differential phase dp 3 5 c aft voltage (no signal) v13 2.0 2.5 3.0 v maximum aft voltage v13h 4.0 4.4 5.0 v minimum aft voltage v13l 0.18 1.0 v aft detection sensitivit y sf 28 40 52 mv/khz vif input resistance ri 45.75mhz 1.5 k ? vif input capacitance ci 45.75mhz 3 pf apc pull-in range (u) fpu 1.3 2.0 mhz apc pull-in range (l) fpl -2.0 -1.4 mhz aft tolerance frequency 1 dfa 1 -150 0 +150 khz vco 1 maximum range (u) dfu 1.5 2.0 mhz vco 1 maximum range (l) dfl -2.0 -1.5 mhz vco control sensitivity b 1.3 2.7 5.4 khz/mv [sif block] limiting sensitivity vli (lim) 39 45 51 db v fm detection output voltage * v o (fm) 4.5mhz 25khz 400 520 660 mvrms amr amr 50 60 db total harmonic distortion thd 0.3 0.8 % sif signal-to-noise ratio s/n (fm) 59 64 db 4.5mhz output level vsout sif in 80db v 87 94 101 db v * : if a wider fm detection output dynamic range is required, in sert a resistor and capacitor in series between pin 23 and groun d to adjust the level.
LA75676VA no.7868-3/10 package dimensions unit : mm (typ) 3287 pin assignment 6.4 6.5 0.5 4.4 (0.5) (1.3) 24 13 1 12 0.22 0.5 0.15 0.1 1.5max sanyo : ssop24(225mil) 4 5 6 7 8 9 3 10 2 1 11 12 13 14 16 15 19 18 17 22 21 20 23 24 sif out rf agc vr gnd aft out rf agc out 2nd agc filter 1st agc filter vif input vco coil vco coil sif input bias filter bpf out fm det out nc v cc video out eq filter 2nd agc filter vif input apc filter video det out eq input fm filter LA75676VA ambient temperature, ta ? ?c pd max -- ta allowable power dissipation, pd max ? mw 0 100 200 300 400 500 600 700 --20 0 20 40 60 80 100 when mounted on a 114.3 76.1 1.6mm 3 glass epoxy board
LA75676VA no.7868-4/10 block diagram and ac charac teristics test circuit test circuit (input inpedance) + + + + 120k ? 6.6k ? 120k ? 100k ? 1.5k ? 7.5k ? 330 ? 560 ? 150 ? 51 ? 10k ? -b 51 ? fm det rf agc if agc vco eq amp hpf video det aft lim amp 9db vif amp 24 23 22 21 20 19 18 17 16 15 14 13 123456789101112 1 f 0.01 f 0.47 f 0.01 f 1 f ( m ) ( d ) ( a ) 0.01 f 330pf 0.01 f 0.015 f 0.01 f 0.01 f 0.01 f 0.01 f 1000pf 24pf ( m ) ( f ) ( b ) v fm det gnd if agc 2nd sif in sif out video out vif in rf ag c 9v out v cc gnd aft out rf agc v r 4.5mhz out ( e ) s1 + 330 ? 10k ? 24 23 22 21 20 19 18 17 16 15 14 13 123456789101112 100 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f v cc vif in impedance analyzer LA75676VA
LA75676VA no.7868-5/10 test conditions v1. circuit current ? ? ? ? [15] 1. internal agc 2. input a 45.75mhz, 10mvrms, cw signal to the vif input pin. 3. rf agc vr maximum 4. connect a current meter to v cc and measure the current flowing into the ic. v2, v3. maximum rf agc voltage, minimum rf agc voltage ? ? ? ? [v9h, v9l] 1. internal agc 2. input a 45.75mhz, 10mvrms, cw signal to the vif input pin. 3. vary the rf agc vr and, at the maximum re sistance, measure the maxi mum rf agc voltage. (f) 4. vary the rf agc vr and, at the minimum re sistance, measure the maxi mum rf agc voltage. (f) v4. input sensitivity ? ? ? ? [vi] 1. internal agc 2. fp = 45.75mhz, 400hz 40% am (vif input) 3. set s1 to the off position and pass the input through a 100k ? resistor. 4. measure the vif input level such that the 400hz detection output level at test point a becomes 0.64vp-p. v5. agc range ? ? ? ? [gr] 1. external agc. apply the v cc voltage to the if agc input (pin 17). 2. with the same conditions as used for v4, measure the vif input level such that the detection output level becomes 0.64vp-p. ? ? ? vi1 3. gr = 20log vi1 vi db v6. maximum allowable input ? ? ? ? [vi max] 1. internal agc 2. fp = 45.75mhz, 15khz 78% am (vif input) 3. measure the vif input level such that the detection output level at test point a is 1db of the video output (vo). v7. video output voltage (no input) ? ? ? ? [v6] 1. external agc. apply the v cc voltage to the if agc input (pin 17). 2. measure the video output (a) dc voltage. v8. sync signal tip voltage ? ? ? ? [v6tip] 1. internal agc 2. input a 45.75mhz, 10mvrms, cw signal to the vif input pin. 3. measure the video output (a) dc voltage. v9. video output level ? ? ? ? [vo] 1. internal agc 2. fp = 45.75mhz, 15khz 78% am vi = 10mvrms (vif input) 3. measure the wave height of the detection output level at test point a. (vp-p)
LA75676VA no.7868-6/10 v10, v11. black noise threshold and clamp voltages ? ? ? ? [vbth, vbcl] 1. apply a dc voltage to the external agc if input (pin 17) and vary that voltage. 2. fp = 45.75mhz, 400hz, 40% am, 10mvrms (vif input) 3. vary the if agc (pin 17) voltage so that the noise canceller operates. measure vbth and vbcl at test point a. v12. video signal-to-noise ratio ? ? ? ? [s/n] 1. internal agc 2. fp = 45.75mhz, cw, 10mvrms (vif input) 3. measure the noise voltage as an rms level at test point a after passing through a 10khz to 4mhz bandpass filter. this is the noise voltage (n). 4. s/n = 20log video component (vp-p) noise voltage (vrms) = 20log 1.12vp-p noise voltage = (db) v13. c/s beating ? ? ? ? [ics] 1. apply a dc voltage to the external agc if input (pin 17) and vary that voltage. 2. fp = 45.75mhz, cw ; 10mvrms fc = 42.17mhz, cw ; 10mvrms - 10db fs = 41.25mhz, cw ; 10mvrms - 10db 3. vary the if agc (pin 17) voltage to adjust the output level at test point a to be 1.3vp-p. 4. measure the difference in level between the 3.58mhz and the 0.92mhz components at test point a. vbcl vbth time video output (v) c/s beating 0.92mhz 3.58m 4.5m frequency (mhz) output (db)
LA75676VA no.7868-7/10 v14. frequency characteristics ? ? ? ? [fc] 1. apply a dc voltage to the external agc if input (pin 17) and vary that voltage. 2. sg1 : 45.75mhz, cw, 10mvrms sg2 : from 45.65mhz to 39.75mhz, cw, 2mvrms add sg1 and sg2 using a t pad, adjust the signal generator levels to those listed above, and apply the result to vif in. 3. first, set the sg2 frequency to 45.65mhz. next, adjust the if agc voltage (pin 17) so that the output level at test point a becomes 0.5vp-p. ? ? v1 4. set the sg2 frequency to 39.75mhz and measure the output level. ? ? v2 5. perform the following calculation. fc = 20log v2 v1 (db) v15, v16. differential gain and differential phase ? ? ? ? [dg, dp] 1. internal agc 2. fp = 45.75mhz, apl 50%, 87.5% video signal, vi = 10mvrms 3. measure dg and dp at test point a. v17. aft voltage (no signal) ? ? ? ? v13 1. internal agc 2. measure the dc voltage on the aft output (b). v18, v19, v20. maximum aft voltage, minimum aft volta ge, aft detection sensitivity ? ? ? ? [v13h, v13l, sf] 1. internal agc 2. fp = 45.75mhz, 1.5mhz sweep, 10mvrms (vif input) 3. record the maximum voltage as v13h and the minimum voltage as v13l. 4. measure the frequency shift fo r the change in voltage at test point b from v1 to v2. ? ? ? f s ? = 2000 (mv) ? f (khz) mv/khz v13h v13l v1 ; 3.5v v2 ; 1.5v if frequency (mhz) aft output (v) ? f
LA75676VA no.7868-8/10 v21, v22. vif input resistance, input capacitance ? ? ? ? [ri, ci] 1. use an impedance analyzer to measure ri and ci in the input impedance test circuit. v23, v24. apc pull-in range ? ? ? ? [fpu, fpl] 1. internal agc 2. fp = 39mhz to 51mhz, cw : 10mvrms 3. vary the signal generator from fp = 45.75mhz towards higher frequencies until pll lock is lost. note : pll lock is lost at the point beating is output at test point a. 4. lower the signal generator frequency until the pll locks again. (f1) 5. lower the signal generator frequency until pll lock is lost. 6. raise the signal generator frequency until the pll locks again. (f2) 7. perform the following calculations. fpu = f1 - 45.75mhz fpl = f2 - 45.75mhz v25. aft tolerance frequency 1 ? ? ? ? [ ? fa1] 1. internal agc 2. sg1 : vary this frequency from 43.75mhz to 47.75mhz, cw, 10mvrms 3. vary the sg1 frequency so that the aft output (test point b) becomes 2.5v. record the sg1 frequency at that point as f1. 4. external agc (adjust v17.) 5. apply 5v to the if agc (pin 17), pick up the vco oscillator frequency from ground or some other point, and measure that frequency. f2 6. perform the following calculation. aft tolerance frequency 1 ? fa1 = f2 - f1 (khz) v26, v27. vco maximum range (u, l) ? ? ? ? [dfu, dfl] 1. external agc. apply the v cc voltage to the if agc (pin 17). 2. pick up the vco oscillator frequency from the video output (a), ground, or some other point and adjust the vco coil so that frequency becomes 45.75mhz. 3. apply 1v to the apc pin (pin 9) and let fl be the frequency at that time. similarly, apply 5v and let fu be the frequency at that time. dfu = fu - 45.75mhz dfl = fl - 45.75mhz v28. vco control sensitivity ? ? ? ? [ ] 1. external agc. apply the v cc voltage to the if agc (pin 17). 2. pick up the vco oscillator frequency from the video output (a), ground, or some other point and adjust the vco coil so that frequency becomes 45.75mhz. 3. apply 3v to the apc pin (pin 9) and let f1 be the frequency at that time. similarly, apply 3.4v and let f2 be the frequency at that time. = f2 - f1 400 (khz/mv)
LA75676VA no.7868-9/10 s1. sif limiting sensitivity ? ? ? ? [vi (lim)] 1. external agc. apply the v cc voltage to the if agc (pin 17). 2. fs = 4.5mhz, fm = 400hz, ? f = 25khz (sif input) 3. set the sif input level to 100mvrms and measure the value at test point d at that time. ? ? v1 4. lower the sif input level and measure the input level such that v1 is down by 3db. s2, s4. fm detection output voltage, total harmonic distortion ? ? ? ? [vo(fm), thd] 1. external agc. apply the v cc voltage to the if agc (pin 17). 2. fs = 4.5mhz, fm = 400hz, ? f = 25khz (sif input, vi = 100mvrms) 3. measure the fm detection output voltage and total harmonic distortion at test point d. s3. am rejection ratio ? ? ? ? [amr] 1. external agc. apply the v cc voltage to the if agc (pin 17). 2. fs = 4.5mhz, fm = 400hz, am = 30% (sif input, vi = 90db v) 3. measure the output voltage at test point d. ? ? ? vam 4. amr = 20log vo (det) vam db s5. sif signal-to-noise ratio ? ? ? ? [s/n] 1. external agc (v17 = v cc ) 2. fs = 4.5mhz, no modulation, vi = 100mvrms 3. measure the output voltage at test point d. ? ? ? ? vn 4. s/n = 20log vo (det) vn db s6. 4.5mhz output level ? ? ? ? [s/n] 1. external agc (v17 = v cc ) 2. fs = 4.5mhz, no modulation, vi = 10mvrms 3. measure the output voltage at test point e. ? ? ? ? vsout note 1. unless specified otherwise, when measuring vif, apply the v cc voltage to the agc and adjust the vco coil so that it oscillates at 45.75mhz. note 2. unless specified otherwise, sw itch sw1 must be in the on position.
LA75676VA ps no.7868-10/10 specifications of any and all sanyo semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. sanyo semiconductor co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo semiconductor co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the "delivery specification" for the sanyo semiconductor product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. this catalog provides information as of november, 2006. specifications and inform ation herein are subject to change without notice.
|
